lecturer engineer iuliana chiuchisan
Courses
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Fundamentals of Digital Electronics
Undergraduated course for 3rd-year students from Mechatronics Department,
Semester III. -
Digital Electronics
Undergraduated course for second year students from Electrotechnical Engineering Department,
Semester IV. -
HDL Design
Undergraduated course for 4th-year students from Computer Science and Electronical Engineering Department,
Semester VIII.
Semester I
Logic design Course
ANALIZA SI
SINTEZA DISPOZITIVELOR NUMERICE/ CIRCUITE INTEGRATE
DIGITALE 1 (AIA,
IETTI, an 1)
Course 1: Introduction in Logic Design
Course 2: Boolean Algebra. Logic Gates
Course 3: Logic functions. Karnaugh Minimization
Course 4: Synthesis of CLC with logic gates
Course 5: Study of decoder
Course 6: Study of multiplexer
Course 7: Study of adders, coder, demultiplexer and arithmetic logical unit
Course 8: Sequential circuits
Course 9: Latches and Flip-Flops
Course 10: Counters
Course 11: Registers
Course 12: Recap exam
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Semester II
Digital Electronics Course
ElectronicĂ II /
Electronica analogica si digitala II/ ELECTRONICĂ
DIGITALĂ (EN, SE,
ESM, MCT, an 2)
Course 1 (Notes): Digital
World
Course 2 (Notes): Logic Circuits. Logic Gates
Course 3 (Notes): Boolean Algebra. Logic Function
Course 4 (Notes): Minimization using Veitch-Karnaugh maps
Course 5 (Notes): Analysis and synthesis of combinational circuits
Course 6 (Notes): Combinational Circuits - Part I
Course 7 (Notes): Combinational Circuits - Part II
Course 8 (Notes): Combinational Circuits - Part III
Course 9 (Notes): Sequential logic design. Mealy finite state machine
Course 10 (Notes): Flip-Flops (CBB)
Course 11 (Notes): Counters. Digital registers
Course 12 (Notes): Recap for exam
Annex 2: Integrated Circuits - Logic Gates
Annex 3: Integrated Circuits - Combinational Circuits
Annex 4: Integrated Circuits - Sequential Circuits
Course 2 (Notes): Logic Circuits. Logic Gates
Course 3 (Notes): Boolean Algebra. Logic Function
Course 4 (Notes): Minimization using Veitch-Karnaugh maps
Course 5 (Notes): Analysis and synthesis of combinational circuits
Course 6 (Notes): Combinational Circuits - Part I
Course 7 (Notes): Combinational Circuits - Part II
Course 8 (Notes): Combinational Circuits - Part III
Course 9 (Notes): Sequential logic design. Mealy finite state machine
Course 10 (Notes): Flip-Flops (CBB)
Course 11 (Notes): Counters. Digital registers
Course 12 (Notes): Recap for exam
Annexes
Annex 1: CodificationAnnex 2: Integrated Circuits - Logic Gates
Annex 3: Integrated Circuits - Combinational Circuits
Annex 4: Integrated Circuits - Sequential Circuits
HDL Design Course
Proiectare VLSI
(C, AIA an 4)
Course 1:
Introduction in VLSI Technologies
Course 2: Level of description in Verilog
Course 3: Structural description in Verilog HDL. Continuous assignment
Course 4: Control blocks in Verilog
Course 5: Procedural block in Verilog HDL
Course 6: Task and function in Verilog HDL
Course 7: Memory description. RAM Memory - Verilog design
Course 2: Level of description in Verilog
Course 3: Structural description in Verilog HDL. Continuous assignment
Course 4: Control blocks in Verilog
Course 5: Procedural block in Verilog HDL
Course 6: Task and function in Verilog HDL
Course 7: Memory description. RAM Memory - Verilog design