Welcome to my personal web page
I am associate professor in the Computer Department of the Faculty of Electrical Engineering and Computer Science, Stefan cel Mare University of Suceava, Romania.
My fields of interest are computing architecture x86, ARM - closed ISA and RISC-V(MIPS) open ISA, Digital Signal Processing and Paralell Computing.
Digital competence:
- Digital Signal Processing (Software and Hardware development Tools from Analog Devices - ADSP21xx, ADSP BF5xx);
- SoC-HDL Designing, Synthesis and Verification (Verilog, VHDL, ISE Design, ModelSim, UVM);
- Xilinx FPGA programming platforms (Virtex, ZYNQ Ultrascale+, Versal ACAP);
- Vivado, Vitis HLS, Vitis SDK, Xilinx System Generator MATLAB/Simulink tools;
- Verilog, VHDL, SystemC/C++ (including synthesizable version) languages.
- Embedded Systems Programming and Design;
- High Level Programming (C, C++, Visual C, Python);
- Low Level Programming ( x86, ARM, RISC-V(MIPS) assembling);
- PCB Designing (Orcad, Protel-Altium Designer);
- Real Time and Parallel Programming (Versal, ZYNQ, Cell BE).